1. Field of the Invention
The present invention relates to a semiconductor device, more particularly to a new structure of an electrode or wiring having two layers formed by a layer of a polycrystalline silicon and a layer of a high melting point metal or silicide thereof.
2. Description of the Related Art
Polycrystalline silicon is often used as the material of electrodes or wiring in the production of a semiconductor device, particularly, an integrated circuit (IC). Since polycrystalline silicon is a semiconductor, it has a high resistivity compared to a metal. To lower the resistivity impurities of phosphorous, arsenic, boron, or the like are doped in the polycrystalline silicon. These have not, however, managed to reduce the resistivity to the desired level. The still high resistivity of the polycrystalline silicon therefore causes delays in signal propagation.
Recently, to solve this problem, use has been made of a high melting point metal, for example, molybdenum or tungsten, or a silicide thereof. Materials such as molybdenum or tungsten however, are not very suited to production processes of semiconductor devices such as IC's. For example, when molybdenum or tungsten is deposited on a thin silicon dioxide film and heat-treated at a high temperature, the high melting point metal locally reacts with the silicon dioxide and significantly reduces the breakdown voltage of the silicon dioxide film. Further, when a high concentration doped semiconductor contacts molybdenum or tungsten, the contact resistance is remarkably increased.
Unexamined Patent Publication (Kokai) No. 56-79450 (filed on Dec. 30, 1979) discloses an electrode or wiring in a semiconductor device formed by placing or burying molybdenum or tungsten at a part of the polycrystalline silicon layer, but the electrode or wiring suffer from the same problems as mentioned above.